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Reflective Memory System Overview

Compro’s Reflective Memory System (RMS™) is a PCI or VME bus implementation of a distributed multi-node shared memory system.  It provides an extremely high speed, deterministic, low latency communication backbone for interconnecting real-time systems, making it suitable for demanding applications.

Originally developed and patented in 1985 by Gould Computer Systems Division (a Compro predecessor), RMS has been deployed in real-time applications such as flight simulation, energy management and range/telemetry systems around the world.  Compro has since migrated RMS technology to the PCI world, making it a viable solution for modern applications.

General Description

PCI-RMS supports up to 255 systems requiring simultaneous access to the same data.  This requires a PCI-RMS board installed in each system.  Each PCI-RMS board is interconnected via thin coaxial copper (optional fiber optic) cable using Fiber Channel physical-layer protocol in a ring topology.  Each PCI-RMS card includes an external power supply, keeping the ring "alive" if one of the nodes fails.

Each PCI-RMS board identifies one or more memory regions that any system can write to, and transparently reflects data into all interconnected PCI-RMS boards.  Each systems’ reflected memory region is defined as "shared data" available to applications.

Applications simply write to local memory and the PCI-RMS hardware automatically transmits the data to all connected computers’ local memory, with zero CPU overhead at extremely high speeds.  Each participating system in the RMS cluster "sees" a the shared data in one of several predefined local memory "windows".  Essentially, each cooperating system in the real time cluster has a duplicate copy of the shared data, eliminating all contention normally associated with conventional shared memory approaches.

PCI-RMS is compatible with computers running Linux, Windows, Solaris and Tru64 Unix operating systems with an available PCI slot. 

RMS versus Ethernet for Real-Time Applications

Although Ethernet is a viable solution in commercial network environments, it is unattractive for real time applications.  Ethernet is inherently non-deterministic; guaranteeing data packet frequency and latency is difficult.  Ethernet also requires adding a driver that consumes CPU time.  In a simulator host, this time may not be available, and will reduce simulation performance.  Ethernet also lacks inter-system interrupt mechanisms often required in real time environments.

Zero Incremental Integration Impact (ZI3) is a concept made possible by Compro’s PCI-RMS.  Essentially, ZI3 easily permits adding new features and functions to existing systems (referred herein as "host systems"), without affecting host system performance or operation.

Because PCI-RMS operates autonomously by automatically reflecting pre-defined memory regions, add-on systems simply "see" data in their local memory.  PCI-RMS uses a stand-alone engine that re-distributes memory data without using any host system CPU cycles.  Connected systems simply "snoop" reflected memory via a "back-door" mechanism.  With ZI3, new simulator functions like GPWS, TCAS, WRX, wind shear, and IOS are available without requiring host application recoding or affecting host performance.

One example of ZI3 in action is a nuclear power plant monitoring system.  The system had been rigorously certified, and any new capabilities threatened a potentially costly re-certification.  The customer needed remote monitoring and control, and chose ZI3 for the solution.  Using the PCI-RMS Bridge, Compro added a network of Windows PCs interconnected via PCI-RMS cards.  Using the PCI-RMS API, the PC application simply identified memory regions in the plant monitoring system.  All data appearing in those memory regions appeared in PC local memory, where a new PC application collected and analyzed the data, redistributing it to plant administration executives for real-time status.

For flight simulators, ZI3 can eliminate potentially costly FAA re-certification when adding new system functions, and permits subsystem addition without degrading host performance.

 

 


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